Daily Brief — April 11: Artemis Returns, Chips Scale

The Artemis II crew splashed down in the Pacific off San Diego last night, capping a 10-day mission that took humanity farther from Earth than anyone has traveled in 54 years. NASA astronauts Reid Wiseman, Victor Glover, and Christina Koch, along with CSA astronaut Jeremy Hansen, reached a maximum distance of 252,756 miles from Earth on April 6—beating the Apollo 13 record by roughly 3,366 miles. During the lunar flyby, the crew experienced a total solar eclipse with the Moon between the spacecraft and Sun, watching the Sun's corona fade to a soft halo. Pilot Glover told reporters the moment "just blew us all away." The crew is in good health and returning to Johnson Space Center today. For NASA, the splashdown validates the heat shield and recovery systems planned for future crewed moon landings under Artemis III. This is not a symbolic achievement—it is the engineering data that makes the next missions possible.

On the chip side, ASML has moved High-NA EUV lithography from lab to production. The company has shipped approximately ten of these $400 million machines to customers including Intel and SK hynix, capable of etching features just 8 nanometres wide in a single step—the smallest ever achieved commercially—and packing 2.9 times more transistors than the previous generation into the same area. Maarten Voncken, ASML's head of research metrology, framed the urgency plainly: "The demands we see are monumental in the number of chips that are needed and the scaling that is needed." Denser transistors mean more computation per watt, which matters not just for AI performance but for grid stability as data centers scale. This is the hardware foundation the AI buildout has been waiting for.

The EIA's April Short-Term Energy Outlook confirms what grid operators already suspected: 2026 is a record year for U.S. capacity additions. Developers plan to add 86 gigawatts of new utility-scale generation, with solar at 51 percent, battery storage at 28 percent, and wind at 14 percent. Battery storage additions alone will hit 24 GW—up from 15 GW in 2025. Solar generation is forecast to rise 17 percent this year, and by next summer, solar will generate 17 percent more electricity than it did in summer 2025. The largest single project coming online is Tehuacana Creek 1 Solar in Texas, adding 837 MW plus 418 MW of battery storage. For the first time in 2025, summer solar generation surpassed wind; that trend accelerates through 2026.

**BY THE NUMBERS**

252,756 miles — maximum distance Artemis II crew traveled from Earth, the farthest humans have been since 1970.

8 nanometres — smallest feature size ASML's High-NA EUV machine can etch in a single commercial lithography step.

2.9× — transistor density gain of High-NA EUV chips compared to the previous generation.

86 GW — planned U.S. utility-scale capacity additions in 2026, a record if realized, with solar comprising 51 percent.

**WHAT TO WATCH**

Artemis crew debriefing (April 11–13): NASA engineers will extract real-world thermal, structural, and avionics data from the splashdown and the full mission profile. What they learn about heat shield performance under actual re-entry conditions—not simulation—directly feeds into Artemis III design margins. Watch for any anomalies reported in the crew safety briefings; NASA is methodical about publishing these, and they shape the next vehicle's build.

High-NA EUV yield ramp (April–June 2026): Intel and SK hynix will begin moving wafer production from earlier-generation EUV tools to the High-NA machines. The real test is not the machine's capability—it is manufacturing yield at scale. If these ten systems reach 80+ percent yield on production runs within the next two quarters, the AI infrastructure cost curve shifts materially downward. If yields stall below 60 percent, expect delays in next-gen chip availability and renewed bottleneck conversations by summer.